In the quest to produce integrated circuits bearing an ever-increasing number of devices, such as in the production of a four megabit memory, one common understanding is that many planar devices and structures need to be changed to three-dimensional structures, such as vertical structures built upward from the surface of the semiconductor substrate of built down into trenches etched into the substrate. Thus, considerable effort has been devoted to developing trench isolation, trench resistors, trench capacitors and trench transistors. In order to fabricate these trench devices, silicon etching technology must be developed to reproducibly etch narrow, vertical steps.
In developing a completely dry silicon etch process, several important issues must be considered. The etch process must provide a fast etch rate, good uniformity from etch to etch and across the wafer, excellent critical dimension (CD) control and a smooth rounded profile. A survey of current literature reveals that the most common chemistry employed for trench etching of less than one micron (um) in depth is nitrogen trifluoride, NF.sub.3, or NF.sub.3 in an inert mixture. For etching of deeper trenches, such as on the order of 3 .mu.m, chlorinated or brominated plasmas are used. Although considerable information has been published about etch rate, selectivity, etc., little emphasis has been placed by researchers on the exact etch profile, particularly the rounding of trench corners at the top of the trench, trench profile control and CD control.
With respect to miniature capacitors in particular, as device geometries begin to shrink, it becomes increasingly difficult to provide capacitors with high unit capacitance that are not adversely affected by edge effects. Edge effects occur when the electric fields in the storage plates tend to concentrate around the abrupt edges of the structures. The increased electric field can result in premature electrical failure of the capacitor or relatively high field induced leakage currents which undesirably discharge the capacitor.
Avoiding sharp or abrupt geometrical device features is relatively easy for planar capacitors; however, for some of the proposed trench capacitor structures, the features must follow the trench contours which are convoluted and cause sharp edges at the points of directional changes. While these issues are known, most trench etching processes devised are one-step procedures which only address a few of these considerations. A number of trench etching processes have been developed which will produce a generally vertical trench, even with curved or rounded bottom edges. However, no process seems to address rounding the top edges of the trench over which the device features must also be formed.